Designing 64.5kHz Hartley Oscillator

I am taking an analogue electronics course and have been given an assignment to create a 64.5kHz Hartley oscillator using any 5V rail-to-rail operational amplifier. I am trying to design the circuit in simulation first before I build.
I will be using this circuit:
simulate this circuit – Schematic created using CircuitLab
The design equations we have been given for the Hartley oscillator are:
ω
0
=
1
C
3
(L1+L2)
√
ω
K(
ω
0
)=−
L1
L2
K
A=
L2
L1
=
R2
R1
A
I began by choosing
L
1
=
L
2
=10μH
L
and then solving for
C
3
C
with
ω
0
=129000π
ω
to obtain
C
3
=3.04×
10
−
7F
C
then
A=
10μF
10μF
=
100kΩ
100kΩ
A
I've simulated in LTSpice using the circuit below giving it a quick pulse to get the oscillation going:
The results:
From this I observe that the oscillation frequency is very close (64.3kHz) but the response dies out very quickly and does not sustain. My understanding of oscillators is that I want the negative feedback to be equal to positive feedback to fulfill Barkhausens criteria in which the magnitude of the total feedback should be 1 and the phase shift 0? I am obviously missing something important. Any advice on getting this circuit to have a sustained oscillation would be greatly appreciated.